1. Field
Embodiments discussed herein relate to a semiconductor storage device and a method of manufacturing the semiconductor storage device.
2. Description of Related Art
In a dynamic random access memory (DRAM) cell with the 1-transistor/1-capacitor configuration, one current terminal of an access transistor is coupled to a bit line, and the other current terminal of the access transistor is coupled to a storage electrode of a capacitor.
The related art is disclosed in Japanese Laid-open Patent Publication No. H11-265995, etc.